1. Field of the Invention
The present invention relates to a ferroelectric semiconductor storage device, and in particular, to a ferroelectric semiconductor storage device having a plurality of ferroelectric memory cells, each including a transistor connected to both ends of a ferroelectric capacitor.
2. Description of the Related Art
One semiconductor storage device is a ferroelectric memory referred to as a “TC-parallel-unit series connection type ferroelectric memory” (also referred to as a “chain-type FeRAM”), as described in Japanese Patent Laid-Open No. (HEI)10-255483. The chain-type FeRAM includes a plurality of ferroelectric memory cells, each including a ferroelectric capacitor and a transistor connected thereto.
When information is stored in such a ferroelectric memory cell, one block usually includes power-of-two numbers of memory cells, as digital information is represented by binary notation, and information is stored, erased, and so on, on the block-by-block basis. Thus, one block has power-of-two numbers of ferroelectric memory cells connected in series and ferroelectric memory cells in one block are continuously formed in both directions on a semiconductor substrate. As a plurality of blocks exist, each block is provided with a respective selection transistor for selecting a block. Thus, such a ferroelectric memory is formed by the power-of-two numbers of ferroelectric memory cells and a selection transistor as a unit.